The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2020

Filed:

Oct. 31, 2018
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Jeffrey Alan West, Dallas, TX (US);

Byron Lovell Williams, Plano, TX (US);

John Britton Robbins, Allen, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/027 (2006.01); H01L 49/02 (2006.01); H01L 23/544 (2006.01); G03F 7/20 (2006.01); G03F 1/42 (2012.01); G03F 7/16 (2006.01);
U.S. Cl.
CPC ...
H01L 28/60 (2013.01); G03F 1/42 (2013.01); G03F 7/16 (2013.01); G03F 7/20 (2013.01); H01L 21/0274 (2013.01); H01L 23/544 (2013.01); H01L 2223/54426 (2013.01);
Abstract

A method of fabricating an integrated circuit includes applying photoresist to a MESA dielectric layer of a semiconductor structure, to generate a photoresist layer. The method also includes exposing the photoresist layer with a grayscale mask, to generate an exposed photoresist layer. The photoresist exposed layer includes a thick photoresist pattern in a first region, a thin photoresist pattern in a second region where a height of the thin photoresist pattern is less than half a height of the thick photoresist pattern, and a gap region between the thick photoresist pattern and the thin photoresist pattern.


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