The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2020

Filed:

Jun. 21, 2016
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventor:

Masayuki Terai, Suwon-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/24 (2006.01); H01L 45/00 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 27/2481 (2013.01); H01L 23/5221 (2013.01); H01L 27/2427 (2013.01); H01L 45/16 (2013.01); H01L 45/06 (2013.01); H01L 45/126 (2013.01); H01L 45/1233 (2013.01); H01L 45/1675 (2013.01); H01L 45/1683 (2013.01);
Abstract

A semiconductor device includes a first word line and a second word line extending abreast of each other in a first direction. A bit line extends between the first word line and the second word line in a second direction intersecting the first direction. A lower electrode is formed on one surface of the first word line. An ovonic threshold switch (OTS) is formed on the lower electrode. An intermediate electrode is formed on the OTS. A phase change memory (PCM) is formed on the intermediate electrode, and an upper electrode is formed between the first PCM and a surface of the bit line. The width of the first upper electrode in the second direction is narrower than the width of the first intermediate electrode in the second direction.


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