The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2020
Filed:
Sep. 20, 2017
Applicant:
Applied Materials, Inc., Santa Clara, CA (US);
Inventors:
Jaeyong Cho, San Jose, CA (US);
Philip Allan Kraus, San Jose, CA (US);
Assignee:
Applied Materials, Inc., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/683 (2006.01); H01L 21/311 (2006.01); H01L 21/67 (2006.01); H01J 37/32 (2006.01); H01L 21/687 (2006.01);
U.S. Cl.
CPC ...
H01L 21/6833 (2013.01); H01J 37/3255 (2013.01); H01J 37/32706 (2013.01); H01J 37/32715 (2013.01); H01L 21/31116 (2013.01); H01L 21/67069 (2013.01); H01L 21/67103 (2013.01); H01L 21/68757 (2013.01); H01L 21/68742 (2013.01);
Abstract
Embodiments described herein generally relate to plasma assisted or plasma enhanced processing chambers. More specifically, embodiments herein relate to electrostatic chucking (ESC) substrate supports configured to provide pulsed DC voltage to a substrate, and methods of biasing the substrate using the pulsed DC voltage, during plasma assisted or plasma enhanced semiconductor manufacturing processes.