The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2020
Filed:
Mar. 29, 2019
Hongchang Liang, Austin, TX (US);
Jian Tang, Austin, TX (US);
Yizhou Lin, Santa Clara, CA (US);
Other;
Abstract
A method of time budgeting an integrated circuit (IC) including acquiring a graph data structure and clock cycle requirements, where the graph data structure includes at least two identical blocks of a plurality of blocks that correspond to an identical design module. The method acquires internal and external delay values ports of each design module, and sets parameters, which include the internal and external delay values of the at least two identical blocks as equivalent for the identical blocks. The method performs optimization of the parameters of the ports of all of the blocks, and determines whether the optimized parameters of each of the ports satisfy predetermined requirements of the IC. The method outputs a final design of the IC design based on results of the optimization for manufacturing of the IC based on the final design.