The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2020

Filed:

Dec. 23, 2019
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Tamal Das, Kalyani, IN;

Nageswara Rao Kunchapu, Martur, IN;

Umamaheswara Reddy Katta, Bodavada, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/08 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
H03L 7/08 (2013.01); H03K 19/20 (2013.01);
Abstract

A multi-lane transmitter and method of detecting a sync loss are provided. The method includes generating a high-speed clock signal and a sync reset signal synchronized to the high-speed clock signal. A sync loss pulse is generated based on the high-speed clock signal, and the sync loss pulse is provided to each of plural serializer circuits. Each serializer circuit generates a sampled sync loss signal by sampling the sync loss pulse in accordance with a parallel clock signal, and a Boolean value is assigned to the sampled sync loss signal and output. A logic block detects a sync loss when the sampled sync loss signal of any serializer circuit is out of sync from the sync loss pulse based on the Boolean value.


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