The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2020

Filed:

Aug. 24, 2018
Applicant:

Toshiba Memory Corporation, Tokyo, JP;

Inventor:

Kiwamu Watanabe, Kawasaki Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 11/56 (2006.01); G11C 16/34 (2006.01); G11C 16/08 (2006.01); G11C 29/44 (2006.01); G11C 29/52 (2006.01); G11C 29/42 (2006.01);
U.S. Cl.
CPC ...
G11C 16/10 (2013.01); G11C 11/5628 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/3459 (2013.01); G11C 29/42 (2013.01); G11C 29/44 (2013.01); G11C 29/52 (2013.01); G11C 2211/5621 (2013.01); G11C 2211/5641 (2013.01); G11C 2216/14 (2013.01);
Abstract

A memory system includes a memory unit with a plurality of first memory cells connected to a first word line and a memory controller to control the memory unit to write data in page units equal in size to the number of first memory cells. The memory unit is configured to write a plurality of pages of data to the plurality of first memory cells and then read each page of data thus written. The memory controller determines whether or not each page of data, as read from the plurality of first memory cells, satisfies a predetermined condition, and registers a determination result for each page indicating whether the predetermined condition was satisfied.


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