The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 13, 2020
Filed:
Sep. 14, 2015
Applicant:
Hewlett Packard Enterprise Development Lp, Houston, TX (US);
Inventors:
Gregg B Lesartre, Fort Collins, CO (US);
Ryan Akkerman, Plano, TX (US);
Joseph F Orth, Fort Collins, CO (US);
Assignee:
Hewlett Packard Enterprise Development LP, Houston, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/20 (2006.01); G06F 12/02 (2006.01); G06F 11/10 (2006.01); G06F 3/06 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 11/2094 (2013.01); G06F 3/065 (2013.01); G06F 3/0616 (2013.01); G06F 3/0619 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G06F 11/1048 (2013.01); G06F 12/0238 (2013.01); G06F 2201/82 (2013.01); G06F 2212/1036 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7211 (2013.01); G11C 2029/0409 (2013.01);
Abstract
In one example a system includes a memory, and at least one memory controller to: detect a failed first memory location of the memory, remap the failed first location of the memory to a spare second location of the memory based on a pointer stored at the failed first memory location, and wear-level the memory. To wear-level the memory, the memory controller may copy data from the spare second location of the memory to a third location of the memory, and keep the pointer in the failed first memory location.