The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 13, 2020
Filed:
Dec. 28, 2018
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventor:
Hae-Rang Choi, Gyeonggi-do, KR;
Assignee:
SK hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G06F 3/06 (2006.01); G11C 11/408 (2006.01); G11C 11/4091 (2006.01); G11C 11/4096 (2006.01); G11C 29/52 (2006.01); G06F 12/06 (2006.01); G06F 11/10 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); G06F 3/0619 (2013.01); G06F 3/0673 (2013.01); G06F 11/1068 (2013.01); G06F 12/0646 (2013.01); G11C 11/4087 (2013.01); G11C 11/4091 (2013.01); G11C 11/4096 (2013.01); G11C 29/52 (2013.01); G06F 2212/1032 (2013.01);
Abstract
A memory system includes a memory device including a plurality of memory cells, and a memory controller suitable for generating a second address based on a first address indicating a defective memory cell, among the plurality of memory cells, and sequentially transmitting the first address and a first command corresponding to the first address, and the second address and a second command corresponding to the second address to the memory device, during write and read operations of the defective memory cell.