The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2020

Filed:

Jul. 16, 2019
Applicant:

Dell Products, L.p., Round Rock, TX (US);

Inventors:

Shiguo Luo, Austin, TX (US);

Wu Feng-Yu, Taipei, TW;

Assignee:

Dell Products, L.P., Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/158 (2006.01); G05F 1/46 (2006.01); H01L 23/31 (2006.01); H01G 4/30 (2006.01); H02M 1/32 (2007.01);
U.S. Cl.
CPC ...
G05F 1/467 (2013.01); H01G 4/30 (2013.01); H01L 23/3114 (2013.01); H02M 3/158 (2013.01); H02M 2001/327 (2013.01);
Abstract

Embodiments of a power stage with vertical integration for high-density, low-noise voltage regulators are described. In some embodiments, an Information Handling System (IHS) may include: a processor; and a multi-phase voltage regulator (VR) coupled to the processor, where the multi-phase VR comprises at least one power stage, and where the at least one power stage includes: a High-Side Field-Effect Transistor (HSFET) die mounted on a leadframe; a Low-Side FET (LSFET) die mounted on the leadframe; at least one decoupling capacitor mounted on the leadframe; and a driver circuit mounted on a clip, where the clip overlays at least a portion of the HSFET die and the LSFET die.


Find Patent Forward Citations

Loading…