The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2020

Filed:

Aug. 14, 2019
Applicant:

Apex Artificial Intelligence Industries, Inc., Centreville, VA (US);

Inventor:

Kenneth A. Abeloe, Carlsbad, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B60Q 5/00 (2006.01); G05D 1/00 (2006.01); G06N 3/04 (2006.01); G06N 3/08 (2006.01); G10L 13/047 (2013.01); G10L 15/22 (2006.01); G10L 13/04 (2013.01); G06N 20/00 (2019.01); B60W 30/095 (2012.01); G05D 1/02 (2020.01); G06N 5/04 (2006.01); B60R 11/02 (2006.01); B60R 11/04 (2006.01); G10L 15/16 (2006.01);
U.S. Cl.
CPC ...
G05D 1/0088 (2013.01); B60R 11/0217 (2013.01); B60R 11/04 (2013.01); B60W 30/0956 (2013.01); G05D 1/0221 (2013.01); G06N 3/0454 (2013.01); G06N 3/08 (2013.01); G06N 5/046 (2013.01); G06N 20/00 (2019.01); G10L 13/043 (2013.01); G10L 13/047 (2013.01); G10L 15/16 (2013.01); G10L 15/22 (2013.01); B60Q 5/006 (2013.01); B60R 2300/102 (2013.01); B60R 2300/103 (2013.01); G05D 2201/0213 (2013.01); G10L 2015/223 (2013.01);
Abstract

An apparatus having components implemented on one or more solid-state chips. The apparatus includes an input device constructed to generate an input data value (input value), and a neural network implemented on solid-state chips trained to generate an output to control the apparatus by processing the input value. The apparatus also includes another neural network implemented on solid-state chips and configured to receive the output from the neural network. The another neural network is trained to determine whether the output of the neural network corresponds to a predetermined condition and generate a control output from the output of the neural network. The apparatus includes a processor configured receive the control output from the aforementioned another neural network, and in response to the control output indicating the output of the first neural network corresponds to a predetermined condition, and control an operation of the neural network. Corresponding methods are also disclosed.


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