The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2020

Filed:

Nov. 19, 2018
Applicant:

Sony Corporation, Tokyo, JP;

Inventors:

Hye-Yeon Cheong, San Jose, CA (US);

Ali Tabatabai, San Jose, CA (US);

Assignee:

SONY CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N 19/50 (2014.01); H04N 19/61 (2014.01); H04N 19/64 (2014.01); G06T 9/00 (2006.01);
U.S. Cl.
CPC ...
H04N 19/647 (2014.11); G06T 9/004 (2013.01); H04N 19/50 (2014.11); H04N 19/61 (2014.11);
Abstract

An embedded codec (EBC) circuitry includes encoder circuitry to determine a count of bits required to encode a plurality of quantized prediction residual levels in each sub-block of a plurality of sub-blocks of an image block, for a first coding scheme and a second coding scheme. The encoder circuitry allocates a bit value to a signaling bit for each sub-block of the plurality of sub-blocks, based on the determined count of bits. A value of the signaling bit represents either the first coding scheme or the second coding scheme. The encoder circuitry generates a bit-stream of the image block by selective application of either the first coding scheme or the second coding scheme on each sub-block of the plurality of sub-blocks, based on the value allocated to the signaling bit for each sub-block of the plurality of sub-blocks.


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