The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2020
Filed:
Dec. 09, 2019
Psemi Corporation, San Diego, CA (US);
Brian Zanchi, Dracut, MA (US);
Aichen Low, Cambridge, MA (US);
pSemi Corporation, San Diego, CA (US);
Abstract
Power converter circuits, including DC-DC converter circuits, that conserve IC area by utilizing more area-efficient alternatives for measurement circuitry. Various embodiments include a power converter circuit including a charge pump having a plurality of stack-nodes Vand at least one multiplexor for coupling selected stack-nodes Vto a corresponding comparator circuit configured to output a signal indicative of a difference between a selected input to the multiplexor and a reference signal. The number of comparator circuits is less than (N−1)×M, where N is the conversion gain of the power converter circuit (i.e., the number of charge pump stages X plus one), and M is the number of parallel charge pump legs. Related methods include measuring voltages at stack-nodes Vin a charge pump, wherein the stack-nodes Vare selected by means of a multiplexor and an input to a comparator.