The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2020

Filed:

Feb. 22, 2019
Applicant:

Hewlett Packard Enterprise Development Lp, Houston, TX (US);

Inventors:

Xiaoge Zeng, Palo Alto, CA (US);

Zhihong Huang, Palo Alto, CA (US);

Di Liang, Santa Barbara, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 31/112 (2006.01); H01L 31/02 (2006.01); H01L 31/18 (2006.01); H01L 31/0224 (2006.01);
U.S. Cl.
CPC ...
H01L 31/1129 (2013.01); H01L 31/02027 (2013.01); H01L 31/022408 (2013.01); H01L 31/1804 (2013.01);
Abstract

A three-terminal avalanche photodiode provides a first controllable voltage drop across a light absorbing region and a second, independently controllable, voltage drop across a photocurrent amplifying region. The compositions of the absorbing region and the amplifying region may be optimized independently of each other. In the amplifying region, p-doped and n-doped structures are offset from each other both horizontally and vertically. Directly applying a voltage across a controlled region of the photocurrent path increases avalanche gain by shaping the electric field to overlap the photocurrent density. The resulting high-gain, low-bias avalanche photodiodes may be fabricated in integrated optical circuits using commercial CMOS processes, operated by power supplies common to mature computer architecture, and used for optical interconnects, light sensing, and other applications.


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