logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10797072 B1

PDFFull Text
Date of Patent:
Oct. 06, 2020

Filed:

Feb. 21, 2019

Semiconductor device

Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Takuya Inatsuka, Yokkaichi, JP;

Taichi Iwasaki, Yokkaichi, JP;

Osamu Matsuura, Kuwana, JP;

Assignee:

Toshiba Memory Corporation, Minato-ku, JP;

Attorney:

Oblon, McClelland, Maier & Neustadt, L.L.P.

Primary Examiner:

Daniel P Shook

Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 29/36 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/49 (2006.01); H01L 29/04 (2006.01); H01L 27/11573 (2017.01); H01L 27/11565 (2017.01); H01L 27/11568 (2017.01); H01L 29/51 (2006.01); H01L 29/167 (2006.01); H01L 21/02 (2006.01); H01L 21/266 (2006.01); H01L 21/265 (2006.01); H01L 21/027 (2006.01); H01L 21/324 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 27/11565 (2013.01); H01L 27/11568 (2013.01); H01L 27/11573 (2013.01); H01L 29/04 (2013.01); H01L 29/0847 (2013.01); H01L 29/1037 (2013.01); H01L 29/167 (2013.01); H01L 29/36 (2013.01); H01L 29/4916 (2013.01); H01L 29/513 (2013.01); H01L 29/518 (2013.01); H01L 21/0217 (2013.01); H01L 21/0273 (2013.01); H01L 21/02532 (2013.01); H01L 21/02636 (2013.01); H01L 21/266 (2013.01); H01L 21/26513 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01); H01L 21/324 (2013.01);
Abstract

A semiconductor device according to an embodiment includes an N-well region, a first gate electrode, a columnar epitaxial layer, and a first contact. The N-well region includes two P-type impurity diffusion regions. The first gate electrode is provided above the N-well region between the two P-type impurity diffusion regions. The first gate electrode are opposed to the N-well region via a gate insulating film. The columnar epitaxial layer is provided on the P-type impurity diffusion region. The epitaxial layer includes a first semiconductor layer including P-type impurities. The first contact is provided on the first semiconductor layer of the epitaxial layer.

Find Patent Forward Citations

Loading…