The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2020

Filed:

Mar. 14, 2017
Applicant:

Sharp Kabushiki Kaisha, Sakai, Osaka, JP;

Inventors:

Iori Aoyama, Sakai, JP;

Yuichi Kita, Sakai, JP;

Takahiro Sasaki, Sakai, JP;

Hidekazu Miyata, Sakai, JP;

Kazutaka Hanaoka, Sakai, JP;

Assignee:

SHARP KABUSHIKI KAISHA, Sakai, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G02F 1/1362 (2006.01); G09G 3/32 (2016.01); G09G 3/20 (2006.01); G09G 3/34 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3614 (2013.01); G02F 1/136213 (2013.01); G09G 3/20 (2013.01); G09G 3/3413 (2013.01); G09G 3/36 (2013.01); G09G 3/3648 (2013.01); G09G 3/3655 (2013.01); G09G 3/3677 (2013.01); G09G 3/3696 (2013.01); G09G 2300/0434 (2013.01); G09G 2300/0478 (2013.01); G09G 2310/021 (2013.01); G09G 2310/0205 (2013.01); G09G 2310/0235 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0252 (2013.01);
Abstract

In a liquid crystal display device (), each pixel row group is selected by a common scan signal voltage, each pixel row group including N pixel rows which adjoin one another in a column direction. Where two pixel rows which adjoin each other in a column direction and which are included in different pixel row groups are a first pixel row and a second pixel row, the first pixel row includes a pixel which has a pixel electrode () capacitively coupled with a gate bus line () which is associated with the second pixel row. When the first pixel row is included in the qgroup, the second pixel row is included in the (q+1)group. A scan signal voltage supplied to gate bus lines which are associated with the (q+1)group switches from low to high before a scan signal voltage supplied to gate bus lines which are associated with the qgroup switches from high to low.


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