The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2020

Filed:

Sep. 03, 2019
Applicant:

AU Optronics Corporation, Hsin-Chu, TW;

Inventors:

Chia-Che Hung, Hsin-Chu, TW;

Mao-Hsun Cheng, Hsin-Chu, TW;

Chen-Chi Lin, Hsin-Chu, TW;

Meng-Xi Chan, Hsin-Chu, TW;

Ting-Wei Guo, Hsin-Chu, TW;

Peng-Bo Xi, Hsin-Chu, TW;

Assignee:

AU OPTRONICS CORPORATION, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/32 (2016.01);
U.S. Cl.
CPC ...
G09G 3/32 (2013.01); G09G 2300/043 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0439 (2013.01);
Abstract

A pixel circuit applied to an uLED display including a LED, a first transistor˜a sixth transistor and a capacitor. The LED is coupled between a first voltage and a first node. The first transistor is coupled between the first node and a second node. The second transistor is coupled between the second node and a second voltage lower than the first voltage. The third transistor is coupled between a third voltage and a third node. The fourth transistor is coupled between the third node and a fourth node. The fifth transistor is coupled between the fourth node and a fourth voltage. A terminal of the sixth transistor is coupled to the first node. The capacitor is coupled between the second node and the fourth node. The fourth transistor is controlled by a second control signal. The third transistor, the fifth transistor and the sixth transistor are controlled by a third control signal.


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