The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2020

Filed:

Dec. 20, 2017
Applicant:

Liqid Inc., Lafayette, CO (US);

Inventors:

Jason Breakstone, Broomfield, CO (US);

Christopher R. Long, Colorado Springs, CO (US);

German Kazakov, Longmont, CO (US);

James Scott Cannata, Denver, CO (US);

Assignee:

Liqid Inc., Broomfield, CO (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/40 (2006.01); G06T 1/20 (2006.01); G06F 13/42 (2006.01); G06F 12/02 (2006.01); G06F 9/50 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4022 (2013.01); G06F 9/5044 (2013.01); G06F 9/5077 (2013.01); G06F 12/02 (2013.01); G06F 13/28 (2013.01); G06F 13/4282 (2013.01); G06T 1/20 (2013.01); G06F 2213/0026 (2013.01);
Abstract

Disaggregated computing architectures, platforms, and systems are provided herein. In one example, a data system is provided. The data system includes a first assembly comprising a plurality of modular storage bays populated with one or more graphics processing modules each including a graphics processing unit (GPU), wherein the plurality of modular storage bays each comprise a bay connector that includes a bay Peripheral Component Interconnect Express (PCIe) connection. The first assembly further comprises PCIe switch circuitry configured to communicatively couple the bay PCIe connections to a PCIe fabric over one or more external PCIe links.


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