The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2020

Filed:

Nov. 09, 2011
Applicants:

Jerome F. Duluk, Jr., Palo Alto, CA (US);

Lacky V. Shah, Los Altos Hills, CA (US);

Sean J. Treichler, Sunnyvale, CA (US);

Inventors:

Jerome F. Duluk, Jr., Palo Alto, CA (US);

Lacky V. Shah, Los Altos Hills, CA (US);

Sean J. Treichler, Sunnyvale, CA (US);

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/48 (2006.01); G06F 9/46 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 9/4881 (2013.01); G06F 9/463 (2013.01); G06F 9/5005 (2013.01); G06F 9/5038 (2013.01); G06F 2209/483 (2013.01); G06F 2209/486 (2013.01);
Abstract

One embodiment of the present invention sets forth a technique for encapsulating compute task state that enables out-of-order scheduling and execution of the compute tasks. The scheduling circuitry organizes the compute tasks into groups based on priority levels. The compute tasks may then be selected for execution using different scheduling schemes. Each group is maintained as a linked list of pointers to compute tasks that are encoded as task metadata (TMD) stored in memory. A TMD encapsulates the state and parameters needed to initialize, schedule, and execute a compute task.


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