The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 06, 2020
Filed:
Feb. 24, 2017
Applicant:
Fuji Xerox Co., Ltd., Tokyo, JP;
Inventors:
Ryo Kukimiya, Kanagawa, JP;
Masatomo Igarashi, Kanagawa, JP;
Masahiro Ishiwata, Kanagawa, JP;
Junichi Uchiyama, Kanagawa, JP;
Hirofumi Sasaki, Kanagawa, JP;
Mitsuyuki Tamatani, Kanagawa, JP;
Kazuo Yamada, Kanagawa, JP;
Assignee:
FUJI XEROX CO., LTD., Minato-ku, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/44 (2018.01); G06F 9/445 (2018.01); G06F 15/78 (2006.01); G06F 21/57 (2013.01); G06F 21/76 (2013.01); G06F 21/62 (2013.01);
U.S. Cl.
CPC ...
G06F 9/44505 (2013.01); G06F 15/7867 (2013.01); G06F 15/7871 (2013.01); G06F 21/57 (2013.01); G06F 21/6218 (2013.01); G06F 21/76 (2013.01);
Abstract
A reconfigurable logical circuit includes a data processing unit; a memory in which plural combinations of configuration control bits are stored; and a selector unit that selectively switches the plural combinations of configuration control bits stored in the memory and supplies a selected one of the plural combinations of configuration control bits to the data processing unit to reconfigure processing contents of the data processing unit.