The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2020

Filed:

Oct. 10, 2017
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Pär S Westlund, Värmdö, SE;

Lars-Olof B Svensson, Stockholm, SE;

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 16/242 (2019.01); G06F 16/22 (2019.01); G06F 13/00 (2006.01); H03M 7/30 (2006.01); G06F 12/00 (2006.01); G11C 15/04 (2006.01); G06F 12/0864 (2016.01);
U.S. Cl.
CPC ...
G06F 3/061 (2013.01); G06F 3/0655 (2013.01); G06F 3/0683 (2013.01); G06F 12/00 (2013.01); G06F 13/00 (2013.01); G06F 16/2255 (2019.01); G06F 16/242 (2019.01); H03M 7/30 (2013.01); H03M 7/3088 (2013.01); G06F 12/0864 (2013.01); G06F 2212/401 (2013.01); G11C 15/04 (2013.01);
Abstract

A hash content addressable memory system includes a hash content addressable memory block (HCB) that is a physical subsystem of the hash content addressable memory system. The first HCB include first bus select logic. The first bus select logic is connected to a plurality of key buses and to a plurality of operation buses. Each key bus from the plurality of key buses and each operation bus from the plurality of operation buses is connected to one and only one client in a plurality of clients. Every client in the plurality of clients is connected to only one key bus from the plurality of key buses and is connected to only one operation bus from the plurality of operation buses.


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