The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2020

Filed:

Aug. 24, 2015
Applicant:

Hitachi, Ltd., Chiyoda-ku, Tokyo, JP;

Inventors:

Masanao Yamaoka, Tokyo, JP;

Takeshi Kato, Tokyo, JP;

Chihiro Yoshimura, Tokyo, JP;

Masato Hayashi, Tokyo, JP;

Assignee:

HITACHI, LTD., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/80 (2006.01); G06F 1/14 (2006.01); G06N 3/04 (2006.01); G06N 3/063 (2006.01); G06N 5/00 (2006.01); G05B 13/04 (2006.01); G06N 10/00 (2019.01);
U.S. Cl.
CPC ...
G06F 1/14 (2013.01); G05B 13/04 (2013.01); G06F 15/80 (2013.01); G06N 3/0445 (2013.01); G06N 3/0472 (2013.01); G06N 3/063 (2013.01); G06N 5/003 (2013.01); G06N 10/00 (2019.01);
Abstract

An aspect of the present invention for solving the above problem is a system including a first computer, a control module controlled by the first computer, and a second computer configured to be associated with the control module. The second computer includes a plurality of units, and each of the plurality of units includes a first memory that stores a value indicating a state of a node, a second memory that stores a coefficient, and an arithmetic circuit. The arithmetic circuit performs an arithmetic process of determining a value indicating a state of a node of its own unit, based on a value indicating a state of a node of a different unit and the coefficient of its own unit, and storing the determined value in the first memory. The control module supplies a control signal for controlling the arithmetic process to the second computer.


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