The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 29, 2020
Filed:
Feb. 18, 2019
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventor:
Avinash Shreepathi Bhat, Tucson, AZ (US);
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/00 (2006.01); H03K 3/012 (2006.01); H03K 5/24 (2006.01); A61N 1/08 (2006.01); A61N 1/378 (2006.01); H03K 17/687 (2006.01); A61N 1/362 (2006.01);
U.S. Cl.
CPC ...
H03K 3/012 (2013.01); A61N 1/08 (2013.01); A61N 1/378 (2013.01); H03K 5/24 (2013.01); H03K 17/687 (2013.01); A61N 1/362 (2013.01);
Abstract
In one example, a power-on reset (POR) circuit comprises a first transistor coupled to a voltage source, a control terminal of the first transistor coupled to a non-control terminal of the first transistor via a resistor; a second transistor coupled to the resistor, a control terminal of the second transistor is coupled to a non-control terminal of the second transistor; and a comparator having first and second terminals, the first terminal coupled to the non-control terminal of the first transistor and the second terminal coupled to the voltage source via an offset circuit.