The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2020

Filed:

Sep. 14, 2018
Applicant:

Integrated Device Technology, Inc., San Jose, CA (US);

Inventors:

Tumay Kanar, San Diego, CA (US);

Samet Zihir, San Diego, CA (US);

Naveen Krishna Yanduru, San Diego, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H01Q 21/00 (2006.01); H04B 1/44 (2006.01); H03F 1/56 (2006.01); H03F 3/19 (2006.01); H03G 3/30 (2006.01); H03F 3/24 (2006.01); H03F 1/32 (2006.01); H03F 3/195 (2006.01); H03F 3/68 (2006.01); H04B 1/04 (2006.01); H04B 1/18 (2006.01); H04B 1/48 (2006.01); H03K 21/10 (2006.01); H04B 7/06 (2006.01); H01Q 1/52 (2006.01); H01Q 3/28 (2006.01); H01Q 3/36 (2006.01); H01Q 19/30 (2006.01); H01Q 21/06 (2006.01); H03F 1/02 (2006.01); H01Q 1/48 (2006.01); H01Q 1/22 (2006.01); H03H 7/48 (2006.01); H04B 1/401 (2015.01);
U.S. Cl.
CPC ...
H01Q 21/0006 (2013.01); H01Q 1/2283 (2013.01); H01Q 1/48 (2013.01); H01Q 1/523 (2013.01); H01Q 1/526 (2013.01); H01Q 3/28 (2013.01); H01Q 3/36 (2013.01); H01Q 19/30 (2013.01); H01Q 21/0025 (2013.01); H01Q 21/062 (2013.01); H01Q 21/065 (2013.01); H03F 1/0211 (2013.01); H03F 1/0261 (2013.01); H03F 1/3282 (2013.01); H03F 1/565 (2013.01); H03F 3/19 (2013.01); H03F 3/195 (2013.01); H03F 3/245 (2013.01); H03F 3/45089 (2013.01); H03F 3/45475 (2013.01); H03F 3/68 (2013.01); H03G 3/3042 (2013.01); H03H 7/487 (2013.01); H03K 21/10 (2013.01); H04B 1/0458 (2013.01); H04B 1/18 (2013.01); H04B 1/401 (2013.01); H04B 1/44 (2013.01); H04B 1/48 (2013.01); H04B 7/0617 (2013.01); H03F 2200/294 (2013.01); H03F 2200/387 (2013.01); H03F 2200/451 (2013.01);
Abstract

An apparatus includes a first circuit and a plurality of second circuits. The first circuit may be configured to generate a pair of quadrature signals from a radio-frequency signal. The second circuits may each comprise a plurality of cascode amplifiers. The cascode amplifiers may be connected in parallel. The cascode amplifiers may be configured to generate a plurality of intermediate signals by modulating the quadrature signals in response to a first control signal and a second control signal. The first control signal generally switches a contribution of the cascode amplifiers in the generation of the intermediate signal. The second control signal may adjusts a total current passing through all of the cascode amplifiers.


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