The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2020

Filed:

May. 30, 2018
Applicants:

Essencore Limited, Wanchai, HK;

Young Joon Choi, Gyeonggi-do, KR;

Inventors:

Young Joon Choi, Gyeonggi-do, KR;

Seok Cheon Kwon, Gyeonggi-do, KR;

Assignees:

ESSENCORE LIMITED, Wanchai, HK;

Other;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G11C 11/56 (2006.01); G11C 16/26 (2006.01); G11C 16/20 (2006.01); G11C 16/14 (2006.01); G06F 11/10 (2006.01); G11C 29/52 (2006.01); G11C 16/04 (2006.01); H01L 27/11556 (2017.01); H01L 27/11524 (2017.01);
U.S. Cl.
CPC ...
G11C 16/349 (2013.01); G06F 11/1068 (2013.01); G11C 11/5628 (2013.01); G11C 11/5635 (2013.01); G11C 11/5642 (2013.01); G11C 16/0483 (2013.01); G11C 16/14 (2013.01); G11C 16/20 (2013.01); G11C 16/26 (2013.01); G11C 29/52 (2013.01); H01L 27/11524 (2013.01); H01L 27/11556 (2013.01);
Abstract

Disclosed is a method of operating a storage device including a NAND flash memory including memory cells grouped into blocks, each block being divided into pages. According to the method, a controller in the storage device loads, onto a memory region, a look-up table containing first read reference voltage sets corresponding to respective retention degradation stages of the NAND flash memory and second read reference voltages sets corresponding to respective pages which vary in terms of the threshold voltages. Subsequently, the controller performs a read operation on the memory cells on a per-block basis by using the first read reference voltage set corresponding to a current retention degradation stage, the second read reference voltage set corresponding to a current page, or both, until all of the memory cells in a current block are correctly read.


Find Patent Forward Citations

Choi, Young. (2020). Method of operating storage device (U.S. Patent No. 10790035). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10790035

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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