The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 29, 2020

Filed:

Oct. 30, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-Do, KR;

Inventors:

Il-Su Han, Incheon, KR;

Sung-Joon Kim, Seoul, KR;

Jong-Hwa Kim, Seoul, KR;

Da-Hee Jeong, Cheongju-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 16/08 (2006.01); G11C 7/10 (2006.01); G06F 12/00 (2006.01); G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 16/10 (2013.01); G06F 12/00 (2013.01); G06F 13/00 (2013.01); G11C 7/1063 (2013.01); G11C 7/1066 (2013.01); G11C 7/1093 (2013.01); G11C 16/08 (2013.01); G11C 2216/14 (2013.01);
Abstract

A non-volatile memory device includes a non-volatile memory cell array, an input/output pad unit, and a peripheral circuit. The non-volatile memory device executes an operation requested by a controller. The input/output pad component provides a path through which a command and data related to the operation requested by the controller are input to the non-volatile memory device, and through which a result of execution of the requested operation is output to the controller. The peripheral circuit is configured to be loaded with a plurality of commands provided by the controller, to temporarily store program data provided by the controller to be written in the non-volatile memory cell array and data read from the non-volatile memory cell array, to adjust an execution order of the commands asynchronously with the controller based on an internal operation status of the non-volatile memory device, and to execute the commands in the adjusted execution order.


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