The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2020

Filed:

Dec. 21, 2019
Applicant:

Steradian Semiconductors Private Limited, Bangalore, IN;

Inventors:

Amrith Sukumaran, Bangalore, IN;

Gireesh Rajendran, Bangalore, IN;

Ashish Lachhwani, Bangalore, IN;

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/06 (2006.01); H03M 1/14 (2006.01); H03M 1/78 (2006.01); H03H 11/30 (2006.01);
U.S. Cl.
CPC ...
H03M 1/0604 (2013.01); H03H 11/30 (2013.01); H03M 1/145 (2013.01); H03M 1/785 (2013.01);
Abstract

According to an aspect, a tri-level digital to analog converter (DAC) comprises a first set of switches turned on to cause a first analog value with a first error as an output for a first digital value, a second set of switches turned on to cause a second analog value with a second error as the output for a second digital value, wherein, both the first set of switches and the second set of switches are turned on to cause a third analog value, proportional to the first error and the second error, as the output for a digital value equal to zero, and both the first set of switches and the second set of switches are turned off to cause a fourth analog value equal to zero as the output for a fourth digital value representing a reset state.


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