The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2020

Filed:

May. 31, 2019
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Xiong Li, Allen, TX (US);

Adam Lee Shook, Carrollton, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/567 (2006.01); B60R 16/033 (2006.01); H03K 17/687 (2006.01); H03K 17/60 (2006.01); H03K 17/74 (2006.01);
U.S. Cl.
CPC ...
H03K 17/567 (2013.01); B60R 16/033 (2013.01); H03K 17/602 (2013.01); H03K 17/6872 (2013.01); H03K 17/74 (2013.01);
Abstract

Adaptive gate drivers and related methods and systems are disclosed. An example gate driver system includes a comparator, a latch having first and second inputs and outputs, the first input coupled to the comparator, a timer having an input and an output, the input coupled to the first output of the latch, the output coupled to the second input of the latch, control logic having an input and first and second outputs, the input coupled to the second output of the latch, first and second transistors having a gate, a first buffer having an input and an output, the input coupled to the first output of the control logic, the output coupled to the gate of the first transistor, and a second buffer having an input and an output, the input coupled to the second output of the control logic, the output coupled to the gate of the second transistor.


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