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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10784350 B1

PDFFull Text
Date of Patent:
Sep. 22, 2020

Filed:

Mar. 08, 2017

Semiconductor device and method for manufacturing semiconductor device

Applicant:

Mitsubishi Electric Corporation, Chiyoda-ku, JP;

Inventors:

Tetsuro Hayashida, Tokyo, JP;

Takuma Nanjo, Tokyo, JP;

Assignee:

MITSUBISHI ELECTRIC CORPORATION, Tokyo, JP;

Attorney:

Xsensus LLP

Primary Examiner:

Natalia A Gondarenko

Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/36 (2006.01); H01L 29/08 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/51 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/20 (2006.01); H01L 29/40 (2006.01); H01L 29/872 (2006.01); H01L 29/861 (2006.01); H01L 29/868 (2006.01); H01L 29/12 (2006.01); H01L 21/02 (2006.01); H01L 21/265 (2006.01); H01L 21/28 (2006.01); H01L 21/306 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 29/2003 (2013.01); H01L 21/0254 (2013.01); H01L 21/02636 (2013.01); H01L 21/26546 (2013.01); H01L 21/28264 (2013.01); H01L 21/30625 (2013.01); H01L 29/06 (2013.01); H01L 29/0649 (2013.01); H01L 29/0692 (2013.01); H01L 29/0847 (2013.01); H01L 29/12 (2013.01); H01L 29/36 (2013.01); H01L 29/41758 (2013.01); H01L 29/4236 (2013.01); H01L 29/42364 (2013.01); H01L 29/42376 (2013.01); H01L 29/513 (2013.01); H01L 29/517 (2013.01); H01L 29/66212 (2013.01); H01L 29/66522 (2013.01); H01L 29/78 (2013.01); H01L 29/861 (2013.01); H01L 29/868 (2013.01); H01L 29/872 (2013.01); H01L 29/1095 (2013.01);
Abstract

A first insulating layer is disposed on a second surface of a semiconductor substrate, and has an opening. A second insulating layer is disposed on the second surface and separated from the first insulating layer. A stack includes, in sequence on the second surface, a side n-type epitaxial layer and first and second p-type epitaxial layers that are made of a gallium-nitride-based material. The stack has an outer side wall having a portion formed of the second p-type epitaxial layer, an inner side wall extending from the second insulating layer, and a top surface. The n-type contact layer is disposed on the top surface. The source electrode portion is in contact with the n-type contact layer on the top surface, and is in contact with the second p-type epitaxial layer on the outer side wall. A gate insulating film is disposed on the inner side wall.

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