The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2020

Filed:

Apr. 24, 2019
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Won-Young Kim, Seoul, KR;

Sun-Won Kang, Seongnam-si, KR;

Jin-Chan Ahn, Hwaseong-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/02 (2013.01); H01L 24/05 (2013.01); H01L 24/73 (2013.01); H01L 24/16 (2013.01); H01L 24/29 (2013.01); H01L 24/45 (2013.01); H01L 24/48 (2013.01); H01L 2224/0233 (2013.01); H01L 2224/0235 (2013.01); H01L 2224/02166 (2013.01); H01L 2224/02373 (2013.01); H01L 2224/02375 (2013.01); H01L 2224/02379 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/04073 (2013.01); H01L 2224/13101 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/45147 (2013.01); H01L 2224/4824 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73207 (2013.01); H01L 2224/73215 (2013.01); H01L 2224/73265 (2013.01);
Abstract

Provided are a semiconductor device and a semiconductor package including the same. The semiconductor device comprises a semiconductor chip body including a first chip pad on a top surface, a passivation film disposed on the semiconductor chip body and a first redistribution layer that is disposed between the passivation film and the semiconductor chip body with an opening to expose a first chip center pad region at least partially overlapping the first chip pad, a first redistribution center pad region connected to the first chip center pad region, and a first edge pad region spaced apart from the first redistribution center pad region, through the passivation film, wherein a top surface of the first chip center pad region and a top surface of the first redistribution center pad region are not disposed on the same plane.


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