The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2020

Filed:

Jul. 18, 2018
Applicant:

Ampleon Netherlands B.v., Nijmegen, NL;

Inventor:

Mariano Ercoli, Nijmegen, NL;

Assignee:

Ampleon Netherlands B.V., Nijmegen, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); H01L 23/31 (2006.01); H01L 23/495 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 23/3114 (2013.01); H01L 23/4952 (2013.01); H01L 23/49503 (2013.01); H01L 23/49568 (2013.01); H01L 23/49575 (2013.01); H01L 2224/49111 (2013.01);
Abstract

The present invention relates to an electrical component. The present invention further relates to an electrical device comprising such an electrical component and to a flat no-lead package. According to the invention, the flat no-lead package comprises a semiconductor die comprising electrical circuitry that has a plurality of terminals for inputting and outputting one or more signals, a thermal pad on which the semiconductor die is mounted, a plurality of leads arranged spaced apart from the thermal pad, and a plurality of further leads that are integrally connected to the thermal pad. One or more terminals among the plurality of terminals are each connected to a respective lead, and one or more terminals among the plurality of terminals are each connected to a respective further lead.


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