The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 22, 2020
Filed:
Sep. 11, 2018
Applicant:
Renesas Electronics Corporation, Tokyo, JP;
Inventors:
Nhat Van Huynh, Tokyo, JP;
Seiji Mochizuki, Tokyo, JP;
Katsushige Matsubara, Tokyo, JP;
Toshiyuki Kaya, Tokyo, JP;
Assignee:
RENESAS ELECTRONICS CORPORATION, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06T 1/60 (2006.01); H04N 19/423 (2014.01); H04N 1/40 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0611 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01); G06T 1/60 (2013.01); H04N 19/423 (2014.11); H04N 1/40 (2013.01);
Abstract
To provide a semiconductor device which suppresses a delay in processing. The semiconductor device is equipped with a plurality of read units which read data stored across a plurality of banks in a memory having the banks, and an access method managing section which, when one of the read units reads the data, determines a read start bank number being a bank number to start reading according to operation situations of the read units excepting the one read unit, and instructs the determined read start bank number to the one read unit.