The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 15, 2020
Filed:
Feb. 06, 2019
Applicant:
Commissariat a L'energie Atomique ET Aux Energies Alternatives, Paris, FR;
Inventors:
Didier Lattard, Grenoble, FR;
Sebastien Thuries, Grenoble, FR;
Assignee:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 23/49 (2006.01); H01L 25/065 (2006.01); H01L 25/18 (2006.01); H01L 25/00 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 23/49827 (2013.01); H01L 23/5286 (2013.01); H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/8012 (2013.01); H01L 2224/80894 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06524 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06586 (2013.01); H01L 2225/06589 (2013.01);
Abstract
An integrated circuit including a first chip including a stack of a substrate, of an active layer and of interconnect layers; a second chip including a stack of a substrate, of an active layer and of interconnect layers; an interconnect network for interconnecting the first and second chips. The interconnect layer of the highest metallization level of the first chip includes a power distribution network; the interconnect layer of the highest metallization level of the second chip is without a power distribution network.