The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 15, 2020
Filed:
Dec. 12, 2016
Jiangyin Changdian Advanced Packaging Co., Ltd, Jiangsu, CN;
Li Zhang, Jiangsu, CN;
Hong Xu, Jiangsu, CN;
Dong Chen, Jiangsu, CN;
Jinhui Chen, Jiangsu, CN;
Zhiming Lai, Jiangsu, CN;
Qicai Chen, Jiangsu, CN;
JIANGYIN CHANGDIAN ADVANCED PACKAGING CO., LTD, Jiangsu, CN;
Abstract
The present invention provides a chip packaging structure, and a packaging method thereof. The structure comprises a silicon-based main body and chip electrodes. The silicon-based main body is provided with a passivation layer on a front face thereof and passivation layer openings are provided on the passivation layer. The chip electrodes have rear faces embedded in the front face of the silicon-based main body. Front faces of the chip electrodes are exposed through the passivation layer openings. A dielectric layer is provided on an upper surface of the passivation layer, and dielectric layer openings are provided. Metal protrusion structures are provided on the front faces of the chip electrodes. An encapsulation layer is provided on side walls and a rear face of the silicon-based main body. The chip packaging structure of the present invention employs insulation protection on side walls to avoid electrical leakage and short circuit conditions.