The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2020

Filed:

May. 06, 2019
Applicant:

Comchip Technology Co., Ltd., New Taipei, TW;

Inventors:

Chien-Chih Lai, New Taipei, TW;

Hung-Wen Lin, New Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/78 (2013.01); H01L 21/561 (2013.01); H01L 24/94 (2013.01);
Abstract

A method of manufacturing chip package is disclosed. The method includes steps of providing a wafer with an upper surface and a lower surface opposite thereto, in which a plurality of conductive pads are disposed on the upper surface; forming a plurality of conductive bumps on the corresponding conductive pads; thinning the wafer from the lower surface towards the upper surface; forming an insulating layer under the lower surface; etching the upper surface of the wafer to form a plurality of trenches exposing the insulating layer; forming a passivation layer covering an inner wall of each of the trenches; and dicing the passivation layer and the insulating layer along each of the trenches to form a plurality of chip packages.


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Lai, Chien-Chih. (2020). Method for manufacturing a chip package (U.S. Patent No. 10777461). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10777461

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