The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2020

Filed:

Jun. 12, 2019
Applicant:

Fujitsu Limited, Kawasaki-shi, Kanagawa, JP;

Inventors:

Masayoshi Matsumura, Kawasaki, JP;

Hiroshi Nakayama, Yokohama, JP;

Takao Matsui, Kawasaki, JP;

Takashi Yamamoto, Kawasaki, JP;

Yuka Hosokawa, Ota, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/34 (2006.01); G11C 7/10 (2006.01); G11C 16/26 (2006.01); G11C 16/14 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3445 (2013.01); G11C 7/109 (2013.01); G11C 7/1063 (2013.01); G11C 16/14 (2013.01); G11C 16/26 (2013.01); G11C 16/3459 (2013.01);
Abstract

A memory control apparatus includes a randomizer configured to: randomize write data output from an arithmetic processing apparatus, and output the randomized write data to a memory; a derandomizer configured to: derandomize data read from the memory, and generate derandomized read data when a flag included in the data read from the memory indicates the randomized write data; and a selector configured to: select the derandomized read data and output the selected derandomized read data to the arithmetic processing apparatus when the flag indicates the randomized write data, and select the data read from the memory and output the selected read data to the arithmetic processing apparatus when the flag indicates deleted data.


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