The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2020

Filed:

Nov. 21, 2019
Applicant:

Himax Technologies Limited, Tainan, TW;

Inventors:

Chi-Hung Liao, Tainan, TW;

Chang-Lung Wu, Tainan, TW;

Jen-Chun Peng, Tainan, TW;

Huan-Sen Liao, Tainan, TW;

Kuo-Tung Hsu, Tainan, TW;

Wei-Jen Chang, Tainan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/22 (2006.01); H02M 3/156 (2006.01);
U.S. Cl.
CPC ...
G09G 3/22 (2013.01); H02M 3/156 (2013.01); G09G 2330/021 (2013.01); G09G 2330/04 (2013.01); G09G 2330/12 (2013.01);
Abstract

The present invention provides a protection circuit and related operation control method to enable the PFM circuit when the operating duration of the PFM circuit is not greater than a first threshold, and disables the PFM circuit when a rest duration of the PFM circuit is not greater than a second threshold. The present invention further provides a protection circuit and related operation control method to avoid starting excessive vertical scanning operations within one frame scanning period by masking one of the gate scanning start signal STV, the gate clock signal CKV and the gate discharge signal OEV. The present invention further provides a protection circuit and related operation control method to disable the gate scanning start signal STV when the number of clock cycles is not equal to a target number of clock cycles, which protects the gate driver from overload.


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