The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 2020

Filed:

Oct. 18, 2018
Applicant:

Shanghai Zhaoxin Semiconductor Co., Ltd., Shanghai, CN;

Inventors:

Jing Chen, Beijing, CN;

Xiaoyang Li, Beijing, CN;

Juanli Song, Beijing, CN;

Zhenhua Huang, Beijing, CN;

Weilin Wang, Beijing, CN;

Jiin Lai, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/22 (2006.01); G06F 9/30 (2018.01); G06F 9/448 (2018.01); G06F 7/499 (2006.01); G06F 7/533 (2006.01); G06F 15/78 (2006.01); G06F 9/38 (2018.01); G06N 3/063 (2006.01);
U.S. Cl.
CPC ...
G06F 9/223 (2013.01); G06F 7/49942 (2013.01); G06F 7/5332 (2013.01); G06F 7/5336 (2013.01); G06F 9/226 (2013.01); G06F 9/3001 (2013.01); G06F 9/3013 (2013.01); G06F 9/30101 (2013.01); G06F 9/30112 (2013.01); G06F 9/3887 (2013.01); G06F 9/4498 (2018.02); G06F 15/7832 (2013.01); G06N 3/063 (2013.01);
Abstract

A microprocessor with dynamically adjustable bit width is provided, which has a bit width register, a datapath, a statistical register, and a bit width adjuster. The bit width register stores at least one bit width. The datapath operates according to the bit width stored in the bit width register to acquire input operands from received data and process input operands. The statistical register collects calculation results of the datapath. The bit width adjuster adjusts the bit width stored in the bit width register based on the calculation results collected in the statistical register.


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