The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2020

Filed:

Sep. 28, 2018
Applicants:

Peter J. Grossmann, Somerville, MA (US);

Matthew Stamplis, Boston, MA (US);

Kate Thurmer, Somerville, MA (US);

Brian Tyrrell, Brookline, NH (US);

Jonathan Frechette, Marlborough, MA (US);

Inventors:

Peter J. Grossmann, Somerville, MA (US);

Matthew Stamplis, Boston, MA (US);

Kate Thurmer, Somerville, MA (US);

Brian Tyrrell, Brookline, NH (US);

Jonathan Frechette, Marlborough, MA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N 5/378 (2011.01); H04N 5/369 (2011.01); H01L 27/146 (2006.01); H04N 5/376 (2011.01); H04N 5/374 (2011.01); H03K 19/17736 (2020.01); H03M 9/00 (2006.01);
U.S. Cl.
CPC ...
H04N 5/378 (2013.01); H01L 27/14634 (2013.01); H01L 27/14649 (2013.01); H04N 5/374 (2013.01); H04N 5/379 (2018.08); H04N 5/3765 (2013.01); H03K 19/17744 (2013.01); H03M 9/00 (2013.01);
Abstract

An imaging device is often paired with a readout integrated circuit (ROIC), which provides processing and data transfer functionality. The circuitry of a ROIC is typically specialized to meet the requirements of an application, which limits the ROIC to a few modes of operation and restricts compatibility to only certain types of imaging devices and applications. Furthermore, the circuitry supporting the processing functionality is limited due to size constraints on the ROIC. These shortcomings can be overcome with a field programmable imaging array (FPIA), which can be implemented as an integrated circuit combining customized ROIC sensor interface circuitry with field programmable gate array (FPGA) circuitry to enable post-fabrication definition of ROIC operational modes. An FPIA chip may form part of a three-chip stack that also includes an analog sensor interface chip for analog-to-digital conversion and an imaging device.


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