The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 08, 2020
Filed:
Oct. 01, 2018
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventors:
Assignee:
SK hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/30 (2006.01); H01L 27/11582 (2017.01); H01L 29/10 (2006.01); H01L 21/768 (2006.01); H01L 27/11565 (2017.01); H01L 21/311 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/0223 (2013.01); H01L 21/31116 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 27/11565 (2013.01); H01L 29/1037 (2013.01); H01L 29/40117 (2019.08);
Abstract
A manufacturing method of a semiconductor device includes: forming pillars in a first region of a stack structure in which interlayer insulating layers and sacrificial insulating layers are alternately stacked; forming a slit in a second region of the stack structure; and removing the sacrificial insulating layers in the first region. In the removing of the sacrificial insulating layers in the first region, a portion of each of the sacrificial insulating layers, which is adjacent to the slit, and a portion of each of the sacrificial insulating layers, which is disposed between the pillars, may be removed using different etching materials.