The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 08, 2020
Filed:
Sep. 10, 2018
Hcl Technologies Limited, Noida, IN;
Manickam Muthiah, Chennai, IN;
Sathish Kumar Krishnamoorthy, Chennai, IN;
HCL Technologies Limited, Noida, Uttar Pradesh, unknown;
Abstract
Disclosed is a system and method for automatically diagnosing an error by performing failure analysis of functional simulation pertaining to a Design Under Verification (DUV) or System Under Verification (SUV). A prediction unit generates a set of expected output packets upon processing a set of input packets' copy. A comparison unit compares an actual output packet, from the set of actual output packets, with an expected output packet, from the set of expected output packets, corresponding to the actual output packet. When there is a mismatch, the actual output packet is compared with at least one subsequent expected output packet until the match is found. The diagnosing unit automatically diagnoses at least one of a packet drop error, an ordering error, an error in routing, by performing a systematic failure analysis and reports a diagnostic information and/or default diagnostic information associated with the error.