The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2020

Filed:

Sep. 28, 2018
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Pradeep Kumar Chawda, Cupertino, CA (US);

Makram Monzer Mansour, San Jose, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 30/327 (2020.01); G06F 30/33 (2020.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); G06F 111/12 (2020.01);
U.S. Cl.
CPC ...
G06F 30/327 (2020.01); G06F 30/33 (2020.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); G06F 2111/12 (2020.01);
Abstract

Generating a template-driven schematic from a netlist of electronic circuits is disclosed. The template-driven schematic may be useful to generate a set of related circuits for a single overall design as well as allow for a common transfer mechanism between different Computer Aided Design (CAD) systems. To assist in portability of designs, a common file format is disclosed based on a structured text file (e.g., XML). Further, in the disclosed approach, it is possible to not only place primitives but create custom symbols as well. In addition, primitives and symbols may be attached to models, simulation settings may be added, and routing of the circuit in a schematic may be completed. Associated devices and methods are disclosed as well.


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