The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2020

Filed:

Sep. 25, 2018
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Joseph Michael Pusdesris, Austin, TX (US);

Miles Robert Dooley, Austin, TX (US);

Alexander Cole Shulyak, Austin, TX (US);

Krishnendra Nathella, Austin, TX (US);

Dam Sunwoo, Austin, TX (US);

Assignee:

Arm Limited, Cambridge, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0862 (2016.01); G06F 9/30 (2018.01); G06F 5/06 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0862 (2013.01); G06F 5/06 (2013.01); G06F 9/30043 (2013.01); G06F 2212/6026 (2013.01);
Abstract

Apparatuses and methods for prefetch generation are disclosed. Prefetching circuitry receives addresses specified by load instructions and can cause retrieval of a data value from an address before that address is received. Stride determination circuitry determines stride values as a difference between a current address and a previously received address. Plural stride values corresponding to a sequence of received addresses are determined. Multiple stride storage circuitry stores the plurality of stride values determined by the stride determination circuitry. New address comparison circuitry determines whether a current address corresponds to a matching stride value based on the plurality of stride values stored in the multiple stride storage circuitry. Prefetch initiation circuitry can causes a data value to be retrieved from a further address, wherein the further address is the current address modified by the matching stride value of the plurality of stride values. By the use of multiple stride values, more complex load address patterns can be prefetched.


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