The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2020

Filed:

May. 07, 2018
Applicant:

E Ink Holdings Inc., Hsinchu, TW;

Inventors:

Kuan-Yi Lin, Hsinchu, TW;

Wen-Chung Tang, Hsinchu, TW;

Po-Wei Chen, Hsinchu, TW;

Yu-Lin Hsu, Hsinchu, TW;

Assignee:

E Ink Holdings Inc., Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 51/05 (2006.01); H01L 51/10 (2006.01); H01L 51/00 (2006.01);
U.S. Cl.
CPC ...
H01L 51/0558 (2013.01); H01L 51/0541 (2013.01); H01L 51/105 (2013.01); H01L 51/107 (2013.01); H01L 51/0003 (2013.01); H01L 51/0023 (2013.01); H01L 51/052 (2013.01); H01L 51/0529 (2013.01);
Abstract

An organic thin film transistor includes a substrate, a source/drain layer that is located on the substrate and has a source region and a drain region, a first buffer layer that is located between the source region and the drain region, a semiconductor layer that is located on the source/drain layer and the first buffer layer, a gate insulating layer, and a gate electrode. The first buffer layer covers at least one portion of the source region and at least one portion of the drain region. The first buffer layer is located among the semiconductor layer, the source region, the drain region, and the substrate. The gate insulating layer covers the source/drain layer and the semiconductor layer. The gate electrode is located on the gate insulating layer, and a portion of the gate insulating layer is located between the gate electrode and the semiconductor layer.


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