The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2020

Filed:

Apr. 23, 2019
Applicant:

Realtek Semiconductor Corporation, Hsinchu, TW;

Inventors:

En-Cheng Liu, Taoyuan, TW;

I-Ching Tsai, Hsinchu, TW;

Yun-Chih Chang, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/394 (2020.01); G06F 30/392 (2020.01); G06F 30/396 (2020.01);
U.S. Cl.
CPC ...
G06F 30/394 (2020.01); G06F 30/392 (2020.01); G06F 30/396 (2020.01);
Abstract

The invention discloses a clock tree synthesis method including steps of: determining a driving strength of a clock cell; determining a reserved space corresponding to the clock cell according to the driving strength; generating the clock cell and the reserved space, wherein the reserved space is adjacent to the clock cell; setting a decoupling capacitor filler cell in the reserved space, wherein the area and/or capacitance of the decoupling capacitor filler cell are/is associated with the driving strength; and fixing the attribute(s) of the clock cell and the attribute(s) of the decoupling capacitor filler cell.


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