The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2020

Filed:

Feb. 18, 2020
Applicant:

Quadric.io, Inc., Burlingame, CA (US);

Inventors:

Nigel Drego, San Carlos, CA (US);

Ananth Durbha, San Carlos, CA (US);

Aman Sikka, San Carlos, CA (US);

Mrinalini Ravichandran, San Carlos, CA (US);

Daniel Firu, San Carlos, CA (US);

Veerbhan Kheterpal, San Carlos, CA (US);

Assignee:

quadric.io, Inc., Burlingame, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/82 (2006.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01);
U.S. Cl.
CPC ...
G06F 9/30134 (2013.01); G06F 9/30101 (2013.01); G06F 9/3838 (2013.01);
Abstract

Systems and methods for implementing an integrated circuit with core-level predication includes: a plurality of processing cores of an integrated circuit, wherein each of the plurality of cores includes: a predicate stack defined by a plurality of single-bit registers that operate together based on one or more of logical connections and physical connections of the plurality of single-bit registers, wherein: the predicate stack of each of the plurality of processing cores includes a top of stack single-bit register of the plurality of single-bit registers having a bit entry value that controls whether select instructions to the given processing core of the plurality of processing cores is executed.


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