The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2020

Filed:

Mar. 04, 2019
Applicant:

Toshiba Memory Corporation, Minato-ku, Tokyo, JP;

Inventors:

Takeshi Miura, Kamakura Kanagawa, JP;

Kenta Inakagata, Ota Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0659 (2013.01); G06F 3/0604 (2013.01); G06F 3/064 (2013.01); G06F 3/068 (2013.01);
Abstract

A memory system includes a first volatile semiconductor memory, a second nonvolatile semiconductor memory that includes a plurality of blocks, and a controller configured to store management information in the first semiconductor memory in which identification information of the blocks and corresponding numbers of valid clusters of the blocks are stored and respectively associated with each other. The controller includes a block management unit configured to generate an update instruction to update the number of valid clusters associated with a block in which data is to be written, according to a write request received from a host, and a first memory controller configured to read, from the first semiconductor memory, the number of valid clusters corresponding to the update instruction, update the read number of valid clusters by an update amount corresponding to the update instruction, and write the updated number of valid clusters back to the first semiconductor memory.


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