The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2020
Filed:
Oct. 15, 2018
Applicants:
Chang Hoon Lee, Montreal, CA;
John Edward Vincent, Ottawa, CA;
Louis-philippe Hamelin, Montreal, CA;
Paul Alepin, Montréal, CA;
Inventors:
Chang Hoon Lee, Montreal, CA;
John Edward Vincent, Ottawa, CA;
Louis-Philippe Hamelin, Montreal, CA;
Paul Alepin, Montréal, CA;
Assignee:
HUAWEI TECHNOLOGIES CO., LTD., Shenzhen, CN;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/10 (2006.01); H03K 5/135 (2006.01); G06F 30/327 (2020.01); G06F 119/06 (2020.01); G06F 119/12 (2020.01);
U.S. Cl.
CPC ...
G06F 1/10 (2013.01); G06F 30/327 (2020.01); H03K 5/135 (2013.01); G06F 2119/06 (2020.01); G06F 2119/12 (2020.01);
Abstract
The embodiments employ a transaction based design methodology to supply clocking when clock pulses are requested. The transactional module receives a clock when it requests a clock pulse and one stage of a logic pipeline is clocked at a time. This methodology reduces dynamic power dissipation by the transactional module from the dynamic power dissipated by traditional synchronous logic designs.