The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2020

Filed:

Nov. 14, 2018
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventor:

Ricky Dale Jordanger, Allen, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02H 9/00 (2006.01); H03K 17/16 (2006.01); H03K 5/04 (2006.01);
U.S. Cl.
CPC ...
H03K 17/166 (2013.01); H02H 9/001 (2013.01); H03K 5/04 (2013.01);
Abstract

A load switch circuit implemented on an IC chip includes a first node for coupling to an input voltage, a second node for coupling to an external load, first and second capacitor nodes for coupling to first and second terminals of an external capacitor, and a first PFET coupled between the first node and the second node to control an output voltage to the external load. The load switch circuit also includes a driver circuit having a first NFET that has a drain coupled to the first node and a source coupled to a gate of the first PFET. A slew-rate-control circuit is coupled to a gate of the first NFET and includes the first capacitor node, which is coupled to the gate of the first NFET, and the second capacitor node, which is coupled to the second node.


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