The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2020

Filed:

Jun. 11, 2018
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Stuart Pullen, Raleigh, NC (US);

Michael Bui, San Diego, CA (US);

Steve Hawley, Emerald Hills, CA (US);

Chunping Song, Sunnyvale, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 1/00 (2006.01); H02M 3/158 (2006.01); G01R 31/40 (2020.01); G01R 19/00 (2006.01); G11C 27/02 (2006.01);
U.S. Cl.
CPC ...
H02M 1/00 (2013.01); G01R 19/003 (2013.01); G01R 31/40 (2013.01); G11C 27/026 (2013.01); H02M 3/158 (2013.01); H02M 2001/0009 (2013.01);
Abstract

Methods and apparatus for current sensing and error correction in a switched-mode power supply composed of a high-side transistor coupled to a low-side transistor are described. One example method generally includes capturing a current associated with the low-side transistor at a first time corresponding to the low-side transistor turning off; capturing a current associated with the high-side transistor at a second time corresponding to a first delay after the high-side transistor turns on; capturing the current associated with the high-side transistor at a third time corresponding to the high-side transistor turning off; and applying a first correction current to a current-summing node of the current-sensing circuit for a first interval based on the first delay, wherein the first correction current is based on the captured current associated with the low-side transistor at the first time and on the captured current associated with the high-side transistor at the second time.


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