The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2020

Filed:

Dec. 08, 2017
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Ye Lu, San Diego, CA (US);

Bin Yang, San Diego, CA (US);

Lixin Ge, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 27/06 (2006.01); H01L 21/768 (2006.01); H01L 21/8238 (2006.01); H01L 21/762 (2006.01); H03K 19/0185 (2006.01); H01L 21/8234 (2006.01); G06F 30/398 (2020.01); H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0688 (2013.01); G06F 30/398 (2020.01); H01L 21/7624 (2013.01); H01L 21/76898 (2013.01); H01L 21/823431 (2013.01); H01L 21/823437 (2013.01); H01L 21/823821 (2013.01); H01L 27/088 (2013.01); H01L 27/0886 (2013.01); H03K 19/018571 (2013.01); H01L 21/823481 (2013.01); H01L 21/823828 (2013.01); H01L 21/823878 (2013.01); H01L 27/0924 (2013.01);
Abstract

An integrated circuit may include a substrate, a first three-dimensional (3D) transistor formed on a first diffusion region of the substrate, and a second 3D transistor formed on a second diffusion region of the substrate. The first 3D transistor may include a gate that extends from between a source and a drain of the first 3D transistor, across an isolation region of the substrate, to and between a source and a drain of the second 3D transistor. The gate may include a gate metal that has an isolation portion extending over the isolation region of the substrate and a diffusion portion extending over the first and second diffusion regions of the substrate. The isolation portion of the gate metal has a thickness less than a maximum thickness of the diffusion portion of the gate metal.


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